专利名称：MICROPROCESSOR INSTRUCTION TO
ENABLE ACCESS OF A VIRTUAL BUFFER INCIRCULAR FASHION
发明人：JONES, Darren, M.,KINTER, Ryan
C.,THEKKATH, Radhika,TRAN, Chinh Nguyen
申请号：EP05789271.3申请日：20050811公开号：EP1709527A1公开日：20061011
摘要：A modular subtraction instruction for execution on a microprocessor having atleast one register. The instruction includes opcode bits for designating the instructionand operand bits for designating at least one register storing an offset index, adecrement value, and an address index. When the modular subtraction instruction isexecuted on the microprocessor, the address index is modified by the decrement value ifthe address index is not zero and is modified by the offset index if the address index iszero. For example, the address index is repeatedly decremented using the decrementvalue until it reaches zero, and then the address index is reset back to the offset index.The operand bits may include multiple fields identifying multiple registers selected fromthe general purpose registers of the microprocessor. The modular subtractioninstruction enables access to a buffer in memory in circular fashion by virtue of itsoperation.
申请人：MIPS Technologies, Inc.
地址：1225 Charleston Road Mountain View, CA 94043-1353 US
国籍：US
代理机构：O'Connell, David Christopher
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